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M61283FP
NTSC TV Signal Processor
REJ03F0054-0100Z Rev.1.0 Sep.23.2003
Features
* * * * * * * * * * * * * * * 4 line composite video signal, 1 line S video signal and 1 line component video signal inputs are available Built-in input video switch with Y/C mixing output Built-in high speed switch for component video signal East-West geometry output VM (Delayed Y) output H output of open corrector type (H at stopping) Selectable of ACL/ABCL Built-in H OSC resonator Built-in vertical saw tooth generator Various signal output for intelligent monitoring function Correspond to fsc clock output H & V pulse output for OSD Built-in 5V & 8V regulator Built-in MCU reset circuit Variable function of BLK width for 16:9 screen
Applications
* NTSC color television receivers
Pin Configuration
Package: 64P6U
Rev.1.0, Sep.23.2003, page 1 of 54
M61283FP
Block Diagram
Rev.1.0, Sep.23.2003, page 2 of 54
M61283FP
Absolute Maximum Ratings
Item Power supply voltage Power dissipation Thermal reduction Operating ambient temperature Storage temperature Symbol Vcc Pd Kt Topr Tstg Ta = 25C Condition Ratings 6.0, 10.0 2026 16.2 -10 to 65 -40 to 125 Unit V mW mW/C C C
Recommended Operating Conditions
Item Power supply voltage1 (Pin41) Power supply voltage2 (Pin10) Power supply voltage3 (Pin13) Power supply voltage4 (Pin52) Symbol Vcc1 Vcc2 Vcc3 Vcc4 Min. 4.75 7.6 7.6 8.3 Typ. 5.0 8.0 8.0 8.7 Max. 5.25 8.4 8.4 9.1 Unit V V V V
Thermal Derating (Maximum Rating)
I2C Bus Table
1. Slave Address = BAH (WRITE), BBH (READ)
A6 1 A5 0 A4 1 A3 1 A2 1 A1 0 A0 1 R/W 1/0
Rev.1.0, Sep.23.2003, page 3 of 54
M61283FP 2. Write Table (input bytes)
3. Read Table (output byts)
D7 KILLERB D6 2WIN WIDEB D5 VFREEB D4 VCOINB D3 0 D2 1 D1 HCOINB D0 1
Rev.1.0, Sep.23.2003, page 4 of 54
M61283FP 4. Bus Functions * Write
Video Function Video Tone Contrast Control Y DL Time Adj Y DL Fine Adj CVBS SW Vidio SW Video Line Out SW Y SW LPF Vidio Mute TRAP Off C-TRAP Adj Black Stretch Off Black Stretch Cont Bit 6 7 2 1 2 2 2 1 1 1 2 1 3 Sub Add 0AH 00H 0CH 0CH 0BH 11H 1FH 0CH 0AH 07H 1DH 0BH 0BH DATA D5-D0 D6-D0 D1-D0 D2 D1-D0 D1-D0 Discription Sharpness level control Contrast level control Y signal delay adjustment Y signal delay fine adjustment CVBS input select; 0: pin 46, 1: pin 42, 2: pin 38, 3: pin 53 Video switch select; 0: CVBS mode, 1: Y/C mode, 2: YcbCr mode, 3: CVBS mode D1-D0 Video Line output select; 0: CVBS SW output, 1: Y/C mix output, 2: Video SW output, 3: mute D3 Pin 14 (Y SW OUT) output f-characteristic switching; 0: flat, 1: LPF (fc = 700 kHz) D7 Y signal output on/off (mute) switching; 0: mute off, 1: mute D3 Y signal chroma trap on/off switching; 0: trap on, 1: trap off D1-D0 Chroma trap frequency fine adjust Black stretch circuit on/off switching; D7 0: black stretch on, 1: black stretch off D6-D4 Black stretch charge, discharge time constant adjustment; D4, D5: charge time constant adjustment; D6: discharge time constant adjustment D7 S-VM Y signal output on/off; 0: off, 1: on D7-D6 S-VM Y signal output delay fine adjustment D6-D0 Hue control D6-D0 Color level control D0 Chroma BPF take-off function on/off switching; 0: BPF; 1: take off D4 Color demodulation angle switching; 0: 103 deg, 1: 95 deg D1 Colorkiller sensitivity switching; 0: 41 dB, 1: 34 dB D7 Forced b/w mode; 0: normal; 1: b/w D2 Forced color mode; 0: normal; 1: color Crystal oscillation circuit forced free-running mode; D6 0: off, 1: free-running D7 Color difference signal (R-Y) delay time adjustment; 0: normal, 1: fast D6-D0 Hue adjustment for color difference input Pedestal adjustment ON/OFF during color difference input; D6 0: on, 1: off D3-D0 Pedestal level fine adjustment for Cb input signal D3-D0 Pedestal level fine adjustment for Cr input signal D5-D4 Cb signal delay time fine adjustment D5-D4 Cr signal delay time fine adjustment D7-D0 Bright level control D6-D0 R output level control D6-D0 B output level control D7-D0 R output DC level control D7-D0 G output DC level control D7-D0 B output DC level control D7 Blue back screen on/off switching; 0: off, 1: blue back D7 White raster on/off switching; 0: off, 1: white back D5 ABCL on/off switching; 0: off, 1: ABCL on D4 ABCL sensitivity low/high switching; 0: low, 1: hi D7 ACL on/off switching; 0: normal, 1: ACL max D5 Analog/digital OSD switching; 0: digital, 1: analog D7 EXT RGB contrast limit value clipping switch; 0: clipping on, 1: clipping off Note V Latch V Latch
V Latch
DL Y On DL Y Adj CHROMA Tint Control Color Control Take Off C Angle95 Killer Level Force Mono Force Color Fsc Free CTI(Color Tras Improvement Baseband Tint Control Cbcr Pedestal Adj On Cb Pedestal Fine Adj Cr Pedestal Fine Adj CbDL Fine Adj CrDL Fine Adj Brightness Control Drive (R) Drive (B) Cut Off (R) Cut Off (G) Cut Off (B) Blue Back WhiteBack ABCL ABCL Gain ACL OFF ANA OSD OSD Clip Off
1 2 7 7 1 1 1 1 1 1 1 7 1 4 4 2 2 8 7 7 8 8 8 1 1 1 1 1 1 1
17H 16H 08H 09H 07H 0CH 07H 02H 1DH 07H 15H 13H 15H 14H 15H 14H 15H 01H 02H 03H 04H 05H 06H 09H 03H 07H 07H 07H 1CH 00H
V Latch V Latch
V Latch
RGB
V Latch
V Latch
Rev.1.0, Sep.23.2003, page 5 of 54
M61283FP * Write (cont.)
RGB Function OSD Clip Level HTONE Matrix Control HV BLK OFF V BLK HALF FASTBLK Hi OSD Bright AFC2 H Phase V Out Stop Service SW H Start AFC1 Gain AFC2 Gain Down H VCO Adj V Shift V-Size H-free V-free S Slice Down Slice Det Down V SYNC DET TIME V1 Window BGPFBP OFF C-SYNC Adj V AGC E/W Parabola E/W Corner E/W Trapezium E/W H Size V S-Correction V Linearity V Blk Wide Bottom V Blk Wide Top V Blk Wide Monitoring Bit 2 1 2 1 1 1 1 4 1 1 1 3 1 3 3 6 1 1 2 1 1 1 1 3 1 6 6 6 6 6 6 2 2 1 4 Sub Add DATA 1EH D5-D4 07H 0CH 0AH 0DH 0BH 1FH 0FH 0EH 0DH 0FH 12H 0FH 1CH 0DH 0EH 0FH 0EH 0DH 0DH 12H 0CH 08H 1EH 17H 18H 19H 1AH 1BH 16H 17H 10H 10H 10H 11H D2 D6-D5 D6 D3 D3 D3 D3-D0 D7 D7 D7 D2-D0 D4 D2-D0 D2-D0 D5-D0 D6 D6 D5-D4 D6 D3 D7 D7 D0-D2 D6 D5-D0 D5-D0 D5-D0 D5-D0 D5-D0 D5-D0 D1D0 D3D2 D4 D7-D4 Discription Note EXT RGB contrast limit value change; 0: 63, 1: 95, 2: 127, 3: 127 Halftone on/off switching; 0: normal, 1: halftone Matrix control; 0: normal, 1: G-Y 10% up, 2: R-Y 5% down, 3: R-Y 5% down, G-Y 10% up RGB HV blanking switch; 0: blanking enabled 1: blanking disabled When used for under-scanning; 0: normal, 1: hide half line FASTBLK switching; 0: normal, 1: hi (full-screen OSD mode) OSD level switching; 0: normal, 1: -12% Screen horizontal position adjustment Pin 38 VOUT (ramp) forced stop mode (when stopped, pin 38 at DC GND level); 0: VOUT, 1: STOP Vertical output on/off switching; 0: vertical output on, 1: vertical output off Horizontal output out/stop switching; 0: stop, 1: H out Horizontal AFC gain adjustment; 000: low to 111: hi Horizontal AFC2 gain high/low switching; 0: high, 1: low H VCO free-running frequency adjustment Vertical ramp start timing adjustment Vertical ramp amplitude adjustment Horizontal output forced free-running mode on/off switching; 0: off, 1: horizontal free-running Vertical output forced free-running mode on/off switching; 0: off, 1: vertical free-running Sync detection slice level switching (0: 65%, 1: 40%, 2: 55%, 3: 35%) 0: normal, 1: lower sync detection sensitivity Vertical minimum sync detection width switching; 0: sync detect width =18 s, 1: sync detect width =14 s Vertical sync detection switching (1 window/2 windows); 0: 2 windows, 1: 1 window Internal BGP on/off switching when no FBP input; 0: BGP on, 1: BGP off C-sync output LPF cutoff frequency adjustment V RAMP AGC speed adjustment; 0: slow, 1: fast (increase AGC speed by five) Parabola adjustment Corner pin adjustment Trapezium correction adjustment Horizontal size adjustment Vertical S-pattern correction adjustment Vertical linearity adjustment Screen bottom blanking adjustment (at VBLK WIDE = 1 only) Screen top blanking adjustment (at VBLK WIDE = 1 only) V BLK WIDE mode switching; 0: normal, 1 WIDE mode Pin 18 intelligent monitor mode switching
DEF
Rev.1.0, Sep.23.2003, page 6 of 54
M61283FP * Read
HCONB -- -- VCOINB VFREEB 2WIN WIDEB KILLERB 1 1 1 1 1 1 1 00H 00H 00H 00H 00H 00H 00H D1 D2 D3 D4 D5 D6 D7 Horizontal sync detection; "1" when asynchronous 1 0 Vertical sync detection; "1" when asynchronous V free-running mode; 0: V free-running, 1: V lock Vertical 2-window detection; 0: wide window, 1: narrow window Colorkiller information output; 0: killer on, 1: killer off
Note: Functions not listed in this bus function table are used only in testing, and operation is not guaranteed.
Rev.1.0, Sep.23.2003, page 7 of 54
M61283FP
Test Circuit
Rev.1.0, Sep.23.2003, page 8 of 54
M61283FP
Input Signals
Video/Chroma/RGB/DEF Block
SG No. SG. A Signal Description (75 termination) NTSC format APL 100% standard video signal. Vertical signal is interlaced at 60 Hz.
SG. B
In the SG.A signal, the Lumi. signal frequency and amplitude can be changed. However, standard amplitude is 0.714 Vp-p. In the figure on the right, the Lumi. signal is represented by f.
SG. C
NTSC standard monochrome video signal. Vertical signal is interlaced at 60 Hz.
SG. D
NTSC format video signal; APL variable. Vertical signal is interlaced at 60 Hz.
SG. E
NTSC format monochrome video signal. In the SG.C signal, the burst and chroma part frequency and amplitude can be changed. Vertical signal is interlaced at 60 Hz. (Standard state: Veb = 0.286 V, Vec = 0.572 V, feb = fec = 3.579545 MHz)
SG. F
Fast blanking signal; synchronized with video input signal.
External RGB (OSD) signal; synchronized with video input signal and blanking signal.
Rev.1.0, Sep.23.2003, page 9 of 54
M61283FP Video/Chroma/RGB/DEF Block (cont.)
SG No. SG.G SG. H Signal Description (75 termination) NTSC format rainbow color bar video signal. Vertical signal is interlaced at 60 Hz. Duty 90%, variable frequency, variable level. (Standard horizontal frequency = 15.734 kHz, vertical frequency = 60 Hz, 1 Vp-p)
SG. I
Duty variable (standard 95%), frequency variable, level variable (Standard: horizontal frequency = 15.734 kHz, vertical frequency = 60 Hz, 1 Vp-p)
SG. J
NTSC format standard color bar video signal; vertical signal is interlaced at 60 Hz.
SG. K SG. L SG. M
NTSC format, standard 8-step wave signal; vertical signal is interlaced at 60 Hz. NTSC format red raster signal; vertical signal is interlaced at 60 Hz. NTSC format H SYNC.
SG. N
Rev.1.0, Sep.23.2003, page 10 of 54
M61283FP
Setup Instructions for Evaluation PCB
1. Horizontal Blanking Pulse Adjustment The horizontal blanking pulse timing and pulse width are adjusted using the variable resistances of a one-shot multivibrator, as shown below.
The timing is adjusted to 8 s using the pin 15 variable resistance of the M74LS221P TTL IC. Also, the pulse width is adjusted to 12 s using the VR1 variable resistance.
2. H VCO Adjustment Prior to measurement of the M61283FP, the following method is used for H VCO adjustment. 1. The H VCO control I C bus data (1 CH D0-D2) is adjusted, and the pin 8 (H OUT) frequency is set to approx. 15.734 kHz.
2
Rev.1.0, Sep.23.2003, page 11 of 54
M61283FP
Electrical Characteristics
(Ta = 25C)
Input signal Symbol ICC ICC5V ICC8V ICC10 ICC13 ICC52 Power V61H V61L V54 V37H1 V37H2 Reset V30H V30L TH30 Item Standard conditions 5 V circuit current (pin 41) 8 V circuit current Pin 10 circuit current Pin 13 circuit current Pin 52 circuit current Power supply circuit standard conditions 8.7 VREG output voltage 1 8.7 VREG output voltage 2 5.7 VREG output voltage 1 MCU 5.7 VREG output voltage 1 MCU 5.7 VREG output voltage 2 Reset standard conditions Maximum reset output voltage Minimum reset output voltage Reset threshold voltage I2C standard conditions ACK current SCL/SDA VTH (L) SCL/SDA VTH (H) Clock frequency -- -- -- -- -- -- 30 30 30 4.5 -- 4.0 5.0 0 4.2 5.5 0.5 4.4 V V V -- -- -- -- -- -- -- -- -- -- 61 61 54 37 37 8.3 -- 5.55 5.45 5.45 8.7 0 5.8 5.7 5.7 9.1 0.3 6.05 5.95 5.95 V V V V V -- -- -- -- -- -- -- -- -- -- 41 10,13 10 13 52 45 27 -- -- 3 60 42 23 19 6 75 57 -- -- 9 mA mA mA mA mA Pin SG Test point Limits Min Typ Max Unit Notes Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V VIDEO/Chroma Vcc Deflection/RGB Drive/East-West 8 V Vcc Reference data; Deflection/East-West Vcc Reference data; RGB Drive 8 V Vcc 8.7 VREG Vcc Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V Pin 28 = 5 V Pin 28 = 0 V Pin 28 = 5 V Pin 28 = 5 V Pin 28 = 0 V Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V
I2C IACK VIL VIH FSCL
-- -- -- -- --
-- -- -- -- --
--
-- --
-- 1 0.75 4.25 --
-- -- 1.5 5.0 100
-- mA V V kHz Reference data
26,27 26,27 27
0.0 3.5 --
Rev.1.0, Sep.23.2003, page 12 of 54
M61283FP
Rev.1.0, Sep.23.2003, page 13 of 54
M61283FP
Symbol VIDEO 2AGV1 2AGV2 2AGV3 2AGV4 2AGVY1 2AGVY2 2AGV1L 2AGV2L 2AGV3L 2AGV4L 2AGVYL1 2AGVYL2 Ymax GY FBY CRF1 CRF2 YDL1 YDL2 YDL3 YDL4 DLYO1 DLYO2 DLYO3 DLYO4 Gtnor GTmax GTmin GT2M GT5M BLS VMF
Item Video standard conditions Video SW1 output level (CVBS1 input) Video SW2 output level (CVBS2 input) Video SW3 output level (CVBS3 input) Video SW4 output level (CVBS4 input) Video SWY output level 1 (Y:Y/C input) Video SWY output level 2 (Y:YCbCr input) Video line SW1 output level (CVBS1 input) Video line SW2 output level (CVBS2 input) Video line SW3 output level (CVBS3 input) Video line SW4 output level (CVBS4 input) Video line SWY output level 1 (Y/C input) Video line SWY output level 2 (YcbCr input) Maximum video output Video gain Video frequency characteristic Chroma trap attenuation 1 Chroma trap attenuation 2 YDL time 1 YDL time 2 YDL time 3 YDL time 4 DL YOUT DL time 1 DL YOUT DL time 2 DL YOUT DL time 3 DL YOUT DL time 4 Video tone control characteristic 1 Video tone control characteristic 2 Video tone control characteristic 3 Video tone control characteristic 4 Video tone control characteristic 5 Black stretch characteristic Video mute function
Input signal Pin SG -- -- 46 42 38 53 51 48 46 42 38 53 51 48 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 46 SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.B SG.C SG.L SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.B SG.B SG.B SG.B SG.B SG.K SG.A
Test point -- 32 32 32 32 32 32 60 60 60 60 60 60 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 58 58 58 58 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16 14,15,16
Limits Min Typ -- -- 1.6 1.6 1.6 1.6 1.6 1.6 0.6 0.6 0.6 0.6 0.6 0.6 2.9 12 -5 -- -- 190 100 100 100 0 100 100 100 1.0 7 -6 -1 -9 0.01 -- 2.0 2.0 2.0 2.0 2.0 2.0 1.0 1.0 1.0 1.0 1.0 1.0 4.2 15 -2 -- -- 260 150 150 150 50 150 150 150 1.4 10 -2 2 -5 0.03 -45
Max -- 2.6 2.6 2.6 2.6 2.6 2.6 1.4 1.4 1.4 1.4 1.4 1.4 5.6 18 -- -18 -6.5 330 250 250 250 100 250 250 250 1.8 14 2 5 -1 0.05 -35
Unit -- Vpp Vpp Vpp Vpp Vpp Vpp Vpp Vpp Vpp Vpp Vpp Vpp V dB dB dB dB ns ns ns ns ns ns ns ns V dB dB dB dB V dB
Notes Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V
f = 800 k, 5 MHz, C-trap: OFF
YDL2 = measured value - YDL1 measured value YDL3 = measured value - YDL2 measured value YDL4 = measured value - YDL3 measured value DLYO2 = measured value - DLYO1 measured value DLYO3 = measured value - DLYO2 measured value DLYO4 = measured value - DLYO3 measured value f = 2.5 MHz f = 2.5 MHz f = 2.5 MHz f = 2 MHz f = 5 MHz
Rev.1.0, Sep.23.2003, page 14 of 54
M61283FP
Rev.1.0, Sep.23.2003, page 15 of 54
M61283FP
Symbol CHROMA CnorR CnorB CnorCr CnorCb ACC1 ACC2 OV VikN KillP APCU APCL R/BN R-YN1 R-YN2 TC1 TC2 BTC1 BTC2 CbDL1 CbDL2 CbDL3 CbDL4 CrDL1 CrDL2 CrDL3 CrDL4 Ffsc1 Vfsc1 Ffscfree1 Vfscfree1 Ffsc2 Vfsc2 Ffscfree2 Vfscfree2
Item Chroma standard conditions Chroma standard output (R-Y) Chroma standard output (B-Y) Chroma standard output (Cr) Chroma standard output (Cb) ACC characteristic 1 ACC characteristic 2 Chroma overload characteristic Killer operation input level Color remaining on colorkilling APC pull-in range (upper) APC pull-in range (lower) Demodulation ratio Demodulation angle 1 Demodulation angle 2 TINT control characteristic 1 TINT control characteristic 2 Base band TINT characteristic 1 Base band TINT characteristic 2 CbDL time 1 CbDL time 2 CbDL time 3 CbDL time 4 CrDL time 1 CrDL time 2 CrDL time 3 CrDL time 4 fsc output frequency 1 fsc output amplitude 1 fsc output frequency 1 in fsc free mode fsc output amplitude 1 in fsc free mode fsc output frequency 2 fsc output amplitude 2 fsc output frequency 2 in fsc free mode fsc output amplitude 2 in fsc free mode
Input signal Pin SG -- -- 46 46 48,44, 40 48,44, 40 46 46 46 46 46 46 46 46 46 46 46 46 48,44, 40 48,44, 40 48,44, 40 48,44, 40 48,44, 40 48,44, 40 48,44, 40 48,44, 40 48,44, 40 48,44, 40 46 46 46 46 46 46 46 46 SG.C SG.C SG.M, SG.N SG.M, SG.N SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.E SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.M, SG.N SG.C SG.C SG.C SG.C SG.C SG.C SG.C SG.C
Test point -- 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 55 55 55 55 29 29 29 29
Limits Min Typ -- -- 390 640 390 500 -3 -6.5 -3 -- -- 300 -- 0.40 86 78 30 30 30 30 200 20 20 20 200 20 20 20
3.5793
Max -- 790 1290 790 940 3 1.5 5 -35 -30 -- -300 0.80 120 112 60 60 -- -- 500 80 80 80 500 80 80 80
3.5799
Unit -- mVpp mVpp mVpp mVpp dB dB dB dB dB Hz Hz -- deg deg deg deg deg deg ns ns ns ns ns ns ns ns MHz mVpp MHz mVpp MHz mVpp MHz mVpp
Notes Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V
560 920 560 720 0 0 2 -40 -45 600 -600 0.57 103 95 45 45 45 45 350 50 50 50 350 50 50 50
3.5796
Veb, Vec: standard input level +6 dB Veb, Vec: standard input level -18 dB Vec = 800 mV Veb, Vec: variable Veb = 0 mV feb = fec: variable feb = fec: variable fec = feb + 50 kHz fec = feb + 50 kHz fec = feb + 50 kHz fec = feb + 50 kHz fec = feb + 50 kHz
CbDL2 = measured value - CbDL1 measured value CbDL3 = measured value - CbDL2 measured value CbDL4 = measured value - CbDL3 measured value
CrDL2 = measured value - CrDL1 measured value CrDL3 = measured value - CrDL2 measured value CrDL4 = measured value - CrDL3 measured value
250
3.5790
500
3.5795
800
3.5810
250
3.5793
500
3.5796
800
3.5799
1400
3.5790
2000
3.5795
2600
3.5810
1400
2000
2600
Rev.1.0, Sep.23.2003, page 16 of 54
M61283FP
Rev.1.0, Sep.23.2003, page 17 of 54
M61283FP
Symbol RGB VBLK Gytyp GYmin GYEnor GYEmin GYEclip Lum nor Lum max Lum min D(R)1 D(B)1 D(R)2 D(B)2 EXD1(R) EXD1(G) EXD1(B) EXD2(R) EXD2(G) EXD2(B) EXD1(R-G) EXD1(G-B) EXD1(B-R) EXD2(R-G) EXD2(B-G) EXA(R) EXA(G) EXA(B) EXA1(R-G) EXA1(G-B) EXA1(B-R) EXA2(R-G) EXA2(B-G)
Item RGB standard conditions Output blanking voltage Contrast control characteristic 1 Contrast control characteristic 2 Contrast control characteristic 3 Contrast control characteristic 4 Contrast control characteristic 5 Brightness control characteristic 1 Brightness control characteristic 2 Brightness control characteristic 3 R driving control characteristic 1 B driving control characteristic 1 R driving control characteristic 2 B driving control characteristic 2 Digital OSD (R) I/O characteristic 1 Digital OSD (G) I/O characteristic 1 Digital OSD (B) I/O characteristic 1 Digital OSD (R) I/O characteristic 2 Digital OSD (G) I/O characteristic 2 Digital OSD (B) I/O characteristic 2 Digital OSD (R-G) amplitude difference Digital OSD (G-B) amplitude difference Digital OSD (B-R) amplitude difference Digital OSD black level DC voltage difference (R-G) Digital OSD black level DC voltage difference (B-G) Analog OSD (R) I/O characteristic Analog OSD (G) I/O characteristic Analog OSD (B) I/O characteristic Analog OSD (R-G) amplitude difference Analog OSD (G-B) amplitude difference Analog OSD (B-R) amplitude difference Analog OSD black level DC voltage difference (R-G) Analog OSD black level DC voltage difference (B-G)
Input signal Pin SG -- -- 46 46 46 46 46 21,22, 23 46 46 46 46 46 46 46 23,24, 46 22,24, 46 21,24, 46 23,24, 46 22,24, 46 21,24, 46 -- -- -- -- -- 23,24, 46 22,24, 46 21,24, 46 -- -- -- -- -- SG.A SG.B SG.B SG.A SG.A SG.F SG.D SG.D SG.D SG.A SG.A SG.A SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A -- -- -- -- -- SG.F, SG.A SG.F, SG.A SG.F, SG.A -- -- -- -- --
Test point -- 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14 16 14 16 14 15 16 14 15 16 -- -- -- -- -- 14 15 16 -- -- -- -- --
Limits Min Typ -- -- 0 1.8 -- 1.8 -- 0.50 2.0 2.6 -- 2.0 2.0 -5.0 -5.0 1.0 1.0 1.0 200 200 200 -350 -350 -350 -350 -350 1.2 1.2 1.2 -350 -350 -350 -250 -250 0.1 2.4 200 2.4 100 0.65 2.4 3.3 1.6 4.0 4.0 -3.0 -3.0 1.5 1.5 1.5 300 300 300 0 0 0 0 0 2 2 2 0 0 0 0 0
Max -- 0.3 2.9 300 2.9 200 0.80 2.8 -- 2.3 6.0 6.0 -1.0 -1.0 2.0 2.0 2.0 400 400 400 350 350 350 350 350 3 3 3 350 350 350 250 250
Unit -- V Vpp mVpp Vpp mVpp Vpp V V V dB dB dB dB Vpp Vpp Vpp V V V mV mV mV mV mV Vpp Vpp Vpp mV mV mV mV mV
Notes Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V f = 100 kHz f = 100 kHz Pin 17 = 2.9 V Pin 17 = 0.0 V Pin 24 = 2.0 V Vy = 0.0 V Vy = 0.0 V Vy = 0.0 V
Vosd = 1.0 V, SW23 = ON Vosd = 1.0 V, SW22 = ON Vosd = 1.0 V, SW21 = ON Vosd = 1.0 V, EXD2(R) = measured value - EXD1(R) Vosd = 1.0 V, EXD2(G) = measured value - EXD1(G) Vosd = 1.0 V, EXD2(B) = measured value - EXD1(B)
Vosd = 0.7 V Vosd = 0.7 V Vosd = 0.7 V
Rev.1.0, Sep.23.2003, page 18 of 54
M61283FP
Rev.1.0, Sep.23.2003, page 19 of 54
M61283FP
Input signal Symbol OFRG OFBG C(R)1 C(G)1 C(B)1 C(R)2 C(G)2 C(B)2 Ccon1 Ccon2 Ccon3 MTXRB MTXGB DOSD1 DOSD2 AOSD1 Item Offset voltage (R-G) Offset voltage (B-G) R cutoff control characteristic 1 G cutoff control characteristic 1 B cutoff control characteristic 1 R cutoff control characteristic 2 G cutoff control characteristic 2 B cutoff control characteristic 2 Color control characteristic 1 Color control characteristic 2 Color control characteristic 3 Matrix ratio R/B Matrix ratio G/B Digital OSD switching characteristic 1 Digital OSD switching characteristic 2 Analog OSD switching characteristic 1 Analog OSD switching characteristic 2 Blue background function (R) Blue background function (G) Blue background function (B) White raster function White balance difference--RB White balance difference--GB Pin 46 46 46 46 46 46 46 46 46 46 46 46 46 23,24, 46 23,24, 46 23,24, 46 23,24, 46 46 46 46 46 46 46 SG SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.D SG.C SG.C SG.C SG.G SG.G SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.F, SG.A SG.A SG.A SG.A SG.A SG.A Y=30% SG.A Y=30%
Test point 14,15 15,16 14 15 16 14 15 16 15 15 15 14,16 15,16 14 14 14
Limits Min -100 -100 2.8 2.8 2.8 1.3 1.3 1.3 3 -- -- 0.9 0.29 -- -- -- Typ 0 0 3.1 3.1 3.1 1.6 1.6 1.6 6 -17 -40 1.10 0.37 0.05 0.05 0.05 Max 100 100 3.4 3.4 3.4 1.9 1.9 1.9 9 -12 -35 1.2 0.45 0.13 0.13 0.13 Unit mV mV V V V V V V dB dB dB -- --
s s s
Notes Vy = 0.0 V Vy = 0.0 V Vy = 0.0 V Vy = 0.0 V Vy = 0.0 V Vy = 0.0 V Vy = 0.0 V Vy = 0.0 V
Vosd = 1.0 V, SW23 = ON Vosd = 1.0 V, SW23 = ON Vosd = 1.0 V
AOSD2
14
--
0.05
0.13
s
Vosd = 1.0 V
BB(R) BB(G) BB(B) WB WBL-RB WBL-GB
14 15 16 14,15, 16 14,16 14,16
1.7 1.7 2.7 2.7 -80.0 -10.0
2.1 2.1 3.7 3.7 -20.0 10.0
2.5 2.5 4.7 4.7 10.0 80.0
V V V V mV mV White level difference with, without burst, with reference to pin 16 (Bout) White level difference with, without burst, with reference to pin 16 (Bout)
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M61283FP
Rev.1.0, Sep.23.2003, page 21 of 54
M61283FP
Symbol DEF fH1 fH2 fH3 Hfree
Item Deflection system standard conditions Horizontal freerunning frequency 1 Horizontal freerunning frequency 2 Horizontal freerunning frequency 3 Forced horizontal free-running operation Horizontal pull-in range (upper) Horizontal pull-in range (lower) Horizontal pulse timing 1 Horizontal pulse timing 2 Horizontal pulse width AFC gain operation Vertical free-running frequency Forced vertical freerunning operation Service mode operation Vertical pull-in frequency (upper) Vertical pull-in frequency (lower) Vertical ramp size Vertical ramp size control range 1 Vertical ramp size control range 2 Vertical ramp position control range 1 Vertical ramp position control range 2 Vertical pulse width Vertical blanking width Vertical blanking width 1 Vertical blanking width 2 Vertical blanking width 3 Vertical blanking width 4 Minimum width in minimum sync operation
Input signal Pin SG -- -- -- -- -- 46 -- -- -- SG.A
Test point -- 8 8 8 8
Limits Min Typ -- -- 15.3 14.7 15.8 15.3 15.7 15.1 16.2 15.7
Max -- 16.1 15.5 16.6 16.1
Unit -- kHz kHz kHz kHz
Notes Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V
In Hfree operation (0FH: D6 = 1)
FPHU FPHL HPT1 HPT2 HPTW AFCG FV Vfree SVC FPVU FPVL VRsi1 VRsc1 VRsc2 VRpo1 VRpo2 VW VBLKW VBLKW1 VBLKW2 VBLKW3 VBLKW4 WVSS
46 46 46 46 -- 46 -- 46 -- 46 46 46 46 46 46 46 46 46 46 46 46 46 46
SG.H SG.H SG.A SG.A -- SG.A -- SG.A -- SG.H SG.H SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.I
8 8 8 8 8 2 20 20 63 20 20 63 63 63 63 63 20 14,15, 16 14,15, 16 14,15, 16 14,15, 16 14,15, 16 63
250 -- 4.5 3.5 21 2.0 55 55 3.5 63 -- 1.7 2.5 0.8 18 820 0.35 1.42 1.41 2.33 2.84 3.34 14
500 -500 6.0 5.0 25 3.0 60 60 4 67 55 2.1 2.9 1.2 38 870 0.53 1.57 1.52 2.43 2.95 3.45 --
-- -250 7.5 6.5 29 10.0 65 65 4.5 -- 57 2.5 3.3 1.6 58 920 0.65 1.72 1.63 2.55 3.06 3.56 --
Hz Hz
s s s
Variable input frequency Variable input frequency
dB Hz Hz V Hz Hz Vpp Vpp Vpp
s s
When 12H is 03, 07, measure and compute amplitude
In Vfree operation (0EH: D6 = 1)
Variable input frequency Variable input frequency
Measured value - VRpo 1
ms ms ms ms ms ms
s
Variable input signal duty
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M61283FP
Rev.1.0, Sep.23.2003, page 23 of 54
M61283FP
Symbol VSco1 VSco2 VL T VL B VLTco1
Item Vertical S-correction control range 1 Vertical S-correction control range 2 Vertical linearity top voltage Vertical linearity bottom voltage Vertical linearity top voltage control range 1 Vertical linearity top voltage control range 2 Vertical linearity bottom voltage control range 1 Vertical linearity bottom voltage control range 2 Parabola size Parabola control range 1 Parabola control range 2 Corner control range 1 Corner control range 2 Trapezoid bottom voltage a Trapezoid bottom voltage b Trapezoid control voltage a1 Trapezoid control voltage a2 Trapezoid control voltage b1 Trapezoid control voltage b2 Parabola top voltage Horizontal size control range 1 Horizontal size control range 2
Input signal Pin SG 46 SG.A 46 46 46 46 SG.A SG.A SG.A SG.A
Test point 63 63 63 63 63
Limits Min Typ 0.1 0.5 -0.9 3.6 1.5 0.05 -0.5 4.0 1.9 0.25
Max 0.9 -0.1 4.4 2.3 0.45
Unit Vpp Vpp V V V
Notes (measured value) - (VRSi 1) (measured value) - (VRSi 1)
(measured value) - (VLT)
VLTco2
46
SG.A
63
-0.45
-0.25
0.05
V
(measured value) - (VLT)
VLBco1
46
SG.A
63
-0.45
-0.25
0.05
V
(measured value) - (VLB)
VLBco2
46
SG.A
63
0.05
0.25
0.45
V
(measured value) - (VLB)
EWP EWPco1 EWPco2 EWCco1 EWCco2 EWTa EWTb EWTcoa1 EWTcoa2 EWTcob1 EWTcob2 EWSi EWSico1 EWSico2
46 46 46 46 46 46 46 46 46 46 46 46 46 46
SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A SG.A
59 59 59 59 59 59 59 59 59 59 59 59 59 59
1.0 1.6 -- -1.0 2.1 2.3 2.3 -0.7 0.05 0.05 -0.7 3.8 0.5 -1.5
1.4 2.0 0.1 -0.4 2.5 2.7 2.7 -0.3 0.3 0.3 -0.3 4.2 0.9 -1.1
1.8 2.4 0.5 0.1 2.9 3.1 3.1 -0.05 0.7 0.7 -0.05 4.6 1.3 -0.7
Vpp Vpp Vpp Vpp Vpp V V V V V V V V V (measured value) - (EWTa) (measured value) - (EWTa) (measured value) - (EWTb) (measured value) - (EWTb)
(measured value) - (EWSi) (measured value) - (EWSi)
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M61283FP
Rev.1.0, Sep.23.2003, page 25 of 54
M61283FP
Symbol Monitoring
MONI1 MONI2 MONI3 MONI4 MONI5 MONI6 MONI7 MONI8 MONI9 MONI10 MONI11 MONI12 MONI14 MONI15 MONI16
Item Intelligent monitor system standard conditions Intelligent monitor 1 (composite sync) Intelligent monitor 2 (R-Y OUT) Intelligent monitor 3 (B-Y OUT) Intelligent monitor 4 (R-Y REF OUT) Intelligent monitor 5 (B-Y REF OUT) Intelligent monitor 6 (video SW output) Intelligent monitor 7 (G out) Intelligent monitor 8 (R out) Intelligent monitor 9 (B out) Intelligent monitor 10 (ACL) Intelligent monitor 11 (V sync) Intelligent monitor 12 (H out) Intelligent monitor 14 (DEF Vcc) Intelligent monitor 15 (video/chroma Vcc) Intelligent monitor 16 (Hi Vcc)
Input signal Pin SG -- --
Test point --
Limits Min Typ -- --
Max --
Unit --
Notes Pin 41 = 5 V, pins 3, 4, 5, 24, 33 = 0 V; pins 10, 13 = 8 V; pin 52 = 8.7 V Reference data Reference data Reference data Reference data Reference data Reference data Reference data. Amplitude measured from blanking level Reference data. Amplitude measured from blanking level Reference data. Amplitude measured from blanking level Reference data Reference data Reference data Reference data Reference data Reference data
46 46 46 46 46 46 46 46 46 -- 46 46 -- -- --
SG.A SG.J SG.J -- -- SG.A SG.A SG.A SG.A -- SG.A SG.A -- -- --
18 18 18 18 18 18 18 18 18 18 18 18 18 18 18
-- -- -- -- -- -- -- -- -- -- -- -- -- -- --
4.9 1090 1350 3.0 3.0 0.90 1.5 1.5 1.5 4.5 3.5 3.5 4.00 3.00 2.70
-- -- -- -- -- -- -- -- -- -- -- -- -- -- --
V mVpp mVpp V V Vpp Vpp Vpp Vpp V Vpp Vpp V V V
* Intelligent Monitor Map 1. Sub Address: 11HD4 - D7 2. Output Pin: Pin18 3. Specification
No. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 11H HEX 0 1 2 3 4 5 6 7 8 9 A B C D E F 11H D7 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D6 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D5 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D4 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Output Signal Composite Sync R-Y OUT B-Y OUT R-Y REF OUT B-Y REF OUT Y SW OUT G OUT R OUT B OUT ACL/ABCL V SYNC H OUT DEF VCC DEF VCC V/C VCC HI VCC
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M61283FP
Rev.1.0, Sep.23.2003, page 27 of 54
M61283FP
Method of Measurement of Electrical Characteristics
Video Block 2AGV1-4 video SW output level 1-4(CVBS1-4 input) 2AGVY1 video SW output level 1(Y input: Y/C) 2AGVY2 video SW output level 2(Y input: YCbCr) 1. Input SG.A to pin 46 (CVBS1), or pin 42 (CVBS2), or pin 38 (CVBS3), or pin 53 (CVBS4), or pin 51 (Y(Y/C)), or pin 48 (Y(YCbCr)). 2. The amplitude (p-p) at pin 32 is measured. * In order to select TV or external input, use the sub-addresses 0BH and 11H. 2AGVL1-4 video line SW output level 1-4(CVBS1-4 input) 2AGVYL1 video line SW output level 1(Y input: Y/C) 2AGVYL2 video line SW output level 2(Y input: YCbCr) 1. Input SG.A to pin 46 (CVBS1), or pin 42 (CVBS2), or pin 38 (CVBS3), or pin 53 (CVBS4), or pin 51 (Y(Y/C)), or pin 48 (Y(YCbCr)). 2. The amplitude (p-p) at pin 60 is measured. * In order to select TV or external input, use the sub-addresses 0BH, 11H, and 1F. Y max maximum video output 1. Input SG.A to pin 46. 2. Measure the amplitude (p-p) other than the blanking part of the output of pins 14, 15, 16.
FBY video frequency characteristic 1. Input SG.B (800kHz, 5 MHz) to pin 46. 2. Measure the amplitude (p-p) other than the blanking part of the output of pins 14, 15, 16, take the results at 800 kHz and 5 MHz as Vr1 and Vr2 respectively. 3. FBY is defined as follows.
CRF1 chroma trap attenuation 1 (normal R/G/B output) TRF maximum chroma trap attenuation 1. Input SG.C to pin 46, measure the 3.58 MHz frequency level with TRAP ON/OFF (07H D3) DATA 1, take the results to be N0. 2. Also measure the level with TRAP ON/OFF (07H D3) DATA 0. 3. CRF1 is defined as follows.
4. Take the minimum value of CRF1 when the I C BUS data of the TRAP fine ADJ (1DH D0/D1) is adjusted to be TRF.
2
Rev.1.0, Sep.23.2003, page 28 of 54
M61283FP CRF2 chroma trap attenuation 2 (normal R/G/B output) 1. Input SG.L to pin 46. The input 3.58 MHz frequency level is N1. 2. Measure the 3.58 MHz frequency level when TRAP ON/OFF (07H D3) DATA 0. 3. CRF2 is defined as follows.
YDL1: YDL time 1 1. Input SG.A to pin 46. 2. Measure the delay time relative to the input signal of pins 14, 15, 16.
The delay time at 50% rise level is measured.
YDL2, 3, 4: YDL time 2, 3, 4 1. Input SG.A to pin 46. 2. Measure the delay time of the input signal and the pin 14, 15, 16 output signals. 3. YDL2, YDL3, YDL4 are defined as follows.
YDL2 = measured value (ns) - YDL1 (measured value) YDL3 = measured value (ns) - YDL2 (measured value) YDL4 = measured value (ns) - YDL3 (measured value)
DLYO1: DELAYED YOUT time 1 1. Input SG.A to pin 46. 2. Measure the delay time relative to the input signal of pin 58.
The delay time at 50% rise level is measured.
DLYO2,3,4: DELAYED YOUT time 2, 3, 4 1. Input SG.A to pin 46. 2. Measure the delay time of the input signal and the pin 58 output signal. 3. DLYO2, DLYO3, DLYO4 are defined as follows.
DLYO2 = measured value (ns) - DLYO1 (measured value) DLYO3 = measured value (ns) - DLYO2 (measured value) DLYO4 = measured value (ns) - DLYO3 (measured value)
Rev.1.0, Sep.23.2003, page 29 of 54
M61283FP GTmax video tone control characteristic 2 1. 2. 3. 4. Input SG.B (f = 2.5 MHz) to pin 46. The output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 H) is taken to be GTnor. The output amplitude of pins 14, 15, 16 when the video tone data is maximum is measured. GTmax is defined as follows.
GTmin video tone control characteristic 3 1. 2. 3. 4. Input SG.B (f = 2.5 MHz) to pin 46. The output amplitude of pins 14, 15, 16 when the video tone data is at the center (20 H) is taken to be GTnor. The output amplitude of pins 14, 15, 16 when the video tone data is minimum is measured. GTmin is defined as follows.
GT2M video tone control characteristic 4 1. 2. 3. 4. Take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 MHz to be GTnor. Input SG.B (f = 2 MHz) to pin 46. Measure pin 14, 15, 16 output amplitude. GT2M is defined as follows
GT5M video tone control characteristic 5 1. 2. 3. 4. Take pin 14, 15, 16 output amplitude when input signal frequency is 2.5 MHz to be GTnor. Input SG.B (f = 5 MHz) to pin 46. Measure pin 14, 15, 16 output amplitude. GT5M is defined as follows.
Rev.1.0, Sep.23.2003, page 30 of 54
M61283FP BLS black stretch characteristic 1. Input SG.K to pin 25. 2. With black stretch off (0BH D7 = 1), adjust the contrast (00H) and brightness (01H), and set the first stage (lowest stage) output level of pin 14, 15, 16 to 2.0 V, and the eighth stage (highest stage) output level to 4.6 V. 3. Change black stretch to on (0BH D7=0), and measure the pin 14, 15, 16 first stage output level. 4. BLS is defined as follows.
VMF video mute function 1. Input SG.A to pin 46. 2. With the mute switch (0AH D7) on "VMFon", off "VMFoff", measure the output amplitude. 3. VMF is defined as follows.
Chroma Block CnorR chroma standard output (R-Y) CnorB Chroma standard output (B-Y) 1. Input SG.C to pin 46. 2 2. When I C data is 11H D4 = 1 and 11H D5 = 1, take the pin 18 output amplitude as the chroma standard output (RY) and chroma standard output (B-Y), respectively. CnorCr chroma standard output (Cr) CnorCb chroma standard output (Cb) 1. Input SG.M and SG.N to pin 48 and pins 40 & 44, respectively. 2. In YCbCr mode (11H data O2H), take the pin 18 output amplitude as the chroma standard output (Cr) and chroma standard output (Cb), respectively. ACC1 ACC characteristic 1 1. Input SG.E (eb = 570 mV: level + 6 dB) to pin 46. 2. Measure the pin 18 output amplitude. 3. ACC1 is defined as follows.
Rev.1.0, Sep.23.2003, page 31 of 54
M61283FP ACC2 ACC characteristic 2 1. Input SG.E (input level: -18 dB) to pin 46. 2. Measure the pin 18 output amplitude. 3. ACC2 is defined as follows.
OV chroma overload characteristic 1. Input SG.E (eb = 800 mVp-p: chroma + 3 dB) to pin 46. 2. Measure the pin 18 output amplitude. 3. OV is defined as follows.
VikN killer operation input level 1. Input SG.E (variable level) at input level 0 dB to pin 46. 2. While monitoring the pin 18 output amplitude, lower the input level, and measure the input level when the output amplitude vanishes. KillP hue remaining with killer 1. Input SG.E (level: -40 dB) to pin 46. 2. Measure the pin 18 output amplitude. APCU APC pull-in range (upper) APCL APC pull-in range (lower) 1. Input SG.E (feb = fec = 3.579545 MHz) to pin 46. 2. After raising the frequency until the output from pin 18 vanishes, lower the frequency, and take the point at which an output appears to be fu. 3. After lowering the frequency until the output from pin 18 vanishes, raise the frequency, and take the point at which an output appears to be fl. 4. APCU and APCL are defined as follows.
APCU = fu - 3579545 Hz APCL = fl - 3579545 Hz
R/BN demodulation ratio R-Y/B-Y 1. 2. 3. 4. Input SG.E (eb = single chroma = ec + 50 kHz) to pin 46. 2 Take the pin 18 output amplitude when I C data is 11H D4 = 1 to be VRY. 2 Take the pin 18 output amplitude when I C data is 11H D5=1 to be VBY. R/BN is defined as follows.
Rev.1.0, Sep.23.2003, page 32 of 54
M61283FP R-YN demodulation angle 1. 2. 3. 4. Input SG.E (eb = single chroma = ec + 5 kHz) to pin 46. 2 Take the pin 18 output amplitude when I C data is 11H D4=1 to be VRY. 2 Take the pin 18 output amplitude when I C data is 11H D5=1 to be VBY. R-YN is defined as follows.
* The vector is determined taking the demodulator gain into account. TC1 TINT control characteristic 1 TC2 TINT control characteristic 2 1. Input SG.C (see figure below) to pin 46. Measure the absolute angle with reference to the pin 18 output voltage, referring to the figure below.
2. Take the TINT data center part (08H data 3CH) to be reference angle "TC", determine the TINT DATA maximum and minimum values. TC1 and TC2 are defined as follows.
TC1 = Tcmax - TC(deg) TC2 = TC - Tcmin(deg)
BTC1 baseband TINT characteristic 1 BTC2 baseband TINT characteristic 2 1. Input SG.M and SG.N to pin 48 and pins 40 & 44, respectively. 2. Set to YCbCr mode (11H data 02H). 3. The output amplitude of pin 18 when the baseband TINT is minimum (13H data 00H) is taken to beas Crmin and Cbmin, respectively. 4. The output amplitude of pin 18 when the baseband TINT is at the center (13H data 40H) is taken asto be Crtyp and Cbtyp, respectively. 5. The output amplitude of pin 18 when the baseband TINT is maximum (13H data 7FH) is taken asto be Crmax and Cbmax, respectively. 6. BTC1 and BTC2 are defined as follows.
Rev.1.0, Sep.23.2003, page 33 of 54
M61283FP CrDL CrDL time 1 CbDL CbDL time 1 1. Input SG.M and SG.N to pin 48 and pins 40 & 44, respectively. 2. Set to YCbCr mode (11H data 02H). 3. Measure the delay time relative to the input signal of pin 18.
The delay time at 50% rise level is measured.
CrDL2,3,4 CrDL time 2,3,4 CbDL2,3,4 CbDL time 2,3,4 1. Input SG.M and SG.N to pin 48 and pins 40 & 44, respectively. 2. Set to YCbCr mode (11H data 02H) and measure the delay time of the input signal and the pin 18 output signal. 3. CrDL2, CrDL3, and CrDL4 are defined as follows.
CrDL2 = measured value (ns) - CrDL1 (measured value) CrDL3 = measured value (ns) - CrDL2 (measured value) CrDL4 = measured value (ns) - CrDL3 (measured value)
Ffsc fsc output frequency 1, 2 Vfsc fsc output amplitude 1, 2 1. Input SG.C to pin 46. 2. Measure the output frequency and amplitude at pin 55 and pin 29. Ffscfree output frequency 1, 2 in fsc free mode Vfscfree output amplitude 1, 2 in fsc free mode 1. Input SG.C to pin 46. 2. Measure the output frequency and amplitude at pin 55 and pin 29 with fsc free (07H D6) DATA 1. RGB Interface Block VBLK output blanking voltage 1. Input SG.A to pin 46. 2. Measure the voltage of the pin 14, 15, 16 pedestal and blanking parts.
Rev.1.0, Sep.23.2003, page 34 of 54
M61283FP GYmax contrast control characteristic 1 GYmin contrast control characteristic 2 1. Input SG.B (f = 100 kHz) to pin 46. 2. Measure the pin 14, 15, 16 output amplitude. GYEnor contrast control characteristic 3 GYEmin contrast control characteristic 4 1. Input SG.A to pin 46. 2. Measure the pin 14, 15, 16 output amplitude when applying 2.9 V and 0 V to pin 18. GYEclip contrast control characteristic 5 1. Input SG.F to pins 21, 22, 23, 24. 2. Minimize the contrast control data, and measure the output amplitude at and above the pedestal part of pins 14, 15, 16. The amplitude of the blanking part is not measured. Lum nor brightness control characteristic 1 Lum max brightness control characteristic 2 Lum min brightness control characteristic 3 1. Input SG.D (Vy = 0 V) to pin 46. 2. Measure the DC voltage other than the blanking part of the output of pins 14, 15, 16.
D(R)1 R drive control characteristic 1 1. Input SG.A to pin 46. 2. Measure the pin 14 output amplitude when the drive control data is at center and is maximum, take the results to be DRnor and DRmax respectively. 3. D (R) 1 is defined as follows.
D(B)1 B drive control characteristic 1 1. Input SG.A to pin 46. 2. Measure the pin 16 output amplitude when the drive control data is at center and is maximum, take the results to be DBnor and DBmax respectively. 3. D(B)1 is defined as follows.
Rev.1.0, Sep.23.2003, page 35 of 54
M61283FP D(R)2 R drive control characteristic 2 1. Input SG.A to pin 46. 2. Measure the pin 14 output amplitude when the drive control data is at center and is minimum, take the results to be DRnor and DRmin respectively. 3. D(R)2 is defined as follows.
D(B)2 B drive control characteristic 2 1. Input SG.A to pin 46. 2. Measure the pin 16 output amplitude when the drive control data is at center and is minimum, take the results to be DBnor and DBmin respectively. 3. D(B)2 is defined as follows.
EXD(R) digital OSD(R) input/output characteristic EXD(G) digital OSD(G) input/output characteristic EXD(B) digital OSD(B) input/output characteristic 1. Input SG.F (Vosd=1.0 V) to pins 21, 22, 23, 24. 2. Measure the output amplitude at and above the pedestal part of pins 14, 15, 16. The amplitude of the blanking part is not measured.
EXD(R-G) digital OSD (R-G) amplitude difference EXD(G-B) digital OSD (G-B) amplitude difference EXD(B-R) digital OSD (B-R) amplitude difference 1. EXD (R-G), EXD (G-B) and EXD (B-R) are defined as follows.
EXD(R-G) = EXD(R) - EXD(G) EXD(G-B) = EXD(G) - EXD(B) EXD(B-R) = EXD(B) - EXD(R)
Rev.1.0, Sep.23.2003, page 36 of 54
M61283FP EXA(R) analog OSD (R) input/output characteristic EXA(G) analog OSD(G) input/output characteristic EXA(B) analog OSD(B) input/output characteristic 1. Input SG.F (Vosd=0.7 V) to pins 21, 22, 23, 24. 2. Measure the output amplitude at and above the pedestal part of pins 14, 15, 16. The amplitude of the blanking part is not measured.
EXA(R-G) analog OSD (R-G) amplitude difference EXA(G-B) analog OSD (G-B) amplitude difference EXA(B-R) analog OSD (B-R) amplitude difference 1. EXA(R-G), EXA(G-B) and EXA(B-R) are defined as follows
EXA(R-G) = EXA(R) - EXA(G) EXA(G-B) = EXA(G) - EXA(B) EXA(B-R) = EXA(B) - EXA(R)
C(R)1 C(G)1 C(B)1 C(R)2 C(G)2 C(B)2
R cutoff characteristic 1 G cutoff characteristic 1 B cutoff characteristic 1 R cutoff characteristic 2 G cutoff characteristic 2 B cutoff characteristic 2
1. Input SG.D (Vy = 0 V) to pin 46. 2. Measure the DC voltage of other than the blanking part in the outputs of pins 14, 15, 16. Ccon1 color control characteristic 1 Ccon2 color control characteristic 2 Ccon3 color control characteristic 3 1. 2. 3. 4. Input SG.C to pin 46. Measure the output amplitudes of pins 14, 15, 16 when IIC DATA 09H=40h, take the results as Ccon0. Measure the output amplitudes of pins 14, 15, 16 under each set of conditions. Ccon1, Ccon2, Ccon3 are defined as follows.
Rev.1.0, Sep.23.2003, page 37 of 54
M61283FP MTXRB matrix ratio R/B MTXGB matrix ratio G/B 1. Input SG.G (rainbow color bar) to pin 46. 2. Measure the output amplitude when pins 14, 15, 16 are respectively VR, VG, VB. 3. MTXRB and MTXGB are defined as follows.
DOSD1 digital OSD switching characteristic 1 DOSD2 digital OSD switching characteristic 2 1. Input SG.F (Vosd=1.0 V) to pins 24, 21, 22, 23. 2. Measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above the pedestal level. The blanking part is not measured.
AOSD1 analog OSD switching characteristic 1 AOSD2 analog OSD switching characteristic 2 1. Input SG.F (Vosd = 0.7 V) to pins 24, 21, 22, 23. 2. Measure the rise time and fall time of the output signals of pins 14, 15, 16 at and above the pedestal level. The blanking part is not measured.
Rev.1.0, Sep.23.2003, page 38 of 54
M61283FP BB(R) blue back function (R) BB(G) blue back function (G) BB(B) blue back function (B) 1. Input SG.A to pin 46. 2. Measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part.
WB white raster function 1. Input SG.A to pin 46. 2. Measure the output amplitude (p-p) of pins 14, 15, 16 other than the blanking part.
WBL-RB white balance difference-RB WBL-GB white balance difference-GB 1. Input SG.A (Y = 30%L with burst) to pin 46. 2. Measure the pin 14, 15, 16 output white level potential from GND. Measured values are taken to be M1R, M1G, M1B respectively. 3. Input SG.A (Y = 30%: without burst) to pin 46. 4. Measure the pin 14, 15, 16 output white level potential from GND. Measured values are taken to be M2R, M2G, M2B respectively. 5. Calculate the differences in measured values. 6. Calculate the differences between calculated values of Rch and Bch with the Bch measured value as reference, defined as follows.
Rev.1.0, Sep.23.2003, page 39 of 54
M61283FP Deflection Block fH1 horizontal free-running frequency 1 fH2 horizontal free-running frequency 2 fH3 horizontal free-running frequency 3 1. Measure the frequency of pin 8 with no input. Hfree forced horizontal free-running operation 1. Input SG.A to pin 46. 2. Set H-FREE CONTROL DATA to on, measure the frequency at pin 8. FPHU horizontal pull-in range (upper) FPHL horizontal pull-in range (lower) 1. Input SG.H to pin 46. 2. Change the frequency of SG.H, measure the frequency range for which the pin 8 output signal and pin 46 input signal are pulled in, with respect to the video signal horizontal frequency. HPT1 horizontal pulse timing 1
HPT2 horizontal pulse timing 2 1. Measure the horizontal pulse timing using the method for HPT1. 2. Standard
HPT2 = (measured value) - HPT1
HPTW horizontal pulse width
AFCG AFC gain operation 1. Measure the pin 38 output amplitude during AFC switching, taking the result when 12HD0 = 1, D1 = 1, D2 = 0 to be AFCtyp, and 12H D0 = 1, D1 = 1, D2 = 1 to be AFCmax. 2. AFCG is defined as follows.
Rev.1.0, Sep.23.2003, page 40 of 54
M61283FP fV vertical free-running frequency 1. Measure the pin 20 output frequency with no input. Vfree forced vertical free-running operation 1. Input SG.A to pin 46. 2. Set V-FREE CONTROL DATA to on, measure the pin 20 output amplitude. SCV service mode operation 1. Measure the pin 63 output DC voltage with the service switch on. FPVU vertical pull-in frequency (upper) FVPL vertical pull-in frequency (lower) 1. Change the SG.H vertical frequency, and measure the frequency when the pin 20 output waveform is pulled in. VRsi vertical ramp size VRsc1 vertical ramp size control range 1 VRsc2 vertical ramp size control range 2
VRpo1 vertical ramp position control range 1
VRpo2 vertical ramp position control range 2 1. Measure the vertical ramp timing using the same method as for VRpo1. 2. VRpo2 is defined as follows.
VRpo2 = (measured value) - VRpo1
VW vertical pulse width
Rev.1.0, Sep.23.2003, page 41 of 54
M61283FP VBLKW vertical BLK width VBLKW1-4 vertical BLK width 1-4 1. VBLKW: Measure the vertical BLK width with V BLK Wide (10H D4 = 0). 2. VBLKW1-4: Measure the vertical BLK width when V Blk Wide Top(10H D3, D2) and V Blk Wide Bottom(10H D1, D0) have been changed with V BLK Wide(10H D4 = 1)
WVSS minimum width at minimum sync operation 1. Reduce the width of the SG.I signal, and measure the input signal width when the pin 63 output waveform pull-in is lost. VSco1 vertical S-correction control range 1 VSco2 vertical S-correction control range 2
VLt vertical linearity top voltage VLb vertical linearity bottom voltage VLcot1 vertical linearity top voltage control range 1 VLcot2 vertical linearity top voltage control range 2 VLcob1 vertical linearity bottom voltage control range 1 VLcob2 vertical linearity bottom voltage control range 2
EW P parabola size EW Pco1 parabola control range 1 EW Pco1 parabola control range 2
Rev.1.0, Sep.23.2003, page 42 of 54
M61283FP EW Cco1 corner control range 1 EW Cco1 corner control range 2
EW Ta trapezoid bottom voltage a EW Tb trapezoid bottom voltage b EW Tcoa1 trapezoid control range a1 EW Tcoa2 trapezoid control range a2 EW Tcob1 trapezoid control range b1 EW Tcob2 trapezoid control range b2
EW Tcoa1, EW T coa2 = (measured value) - EWTa EW Tcob1, EW T cob2 = (measured value) - EWTb
EW Si parabola top voltage EW Sico1 horizontal size control range 1 EW Sico2 horizontal size control range 2
EW Sico1, EW T Sico2 = (measured value) - EWSi
Rev.1.0, Sep.23.2003, page 43 of 54
M61283FP
Pin Peripheral Circuit Diagram
Pin no. 1 Name H VCO FEEDBACK Pin Peripheral Circuitry Notes 3.0 V
2
AFC FILTER
3.5 V
3 4 5 6
LOGIC GND DEF GND1 DEF GND2 FBP IN
-- -- --
0V 0V 0V VTH: 1.0 V
7 9 11 12 8
NC
--
--
H OUT
Open collector output. Maximum inflow current must be 4 mA or less.
Rev.1.0, Sep.23.2003, page 44 of 54
M61283FP
Pin no. 10 13 14 15 16
Name DEF VCC HI VCC R OUT G OUT B OUT
Pin Peripheral Circuitry -- --
Notes 8V 8V --
17
ACL/ABCL
--
18
INTELLIGENT MONITOR
Maximum outflow current = 100 A
19
HD OUT
VOL: 0.0 V VOH: 5.0 V
20
VD OUT
VOL: 0.0 V VOH: 5.0 V
Rev.1.0, Sep.23.2003, page 45 of 54
M61283FP
Pin no. 21 22 23
Name OSD B IN OSD G IN OSD R IN
Pin Peripheral Circuitry
Notes Digital OSD VIL: 0.0 V VIH: 3.0 V
24
FAST BLK
0.0-0.5 V: INT RGB 1.5-3.0 V: H TONE 4.0-5.0 V: EXT RGB
25
CLK CONT
5.0 V
26
SDA
VIL: 0.75 V VIH: 4.25 V
27
SCL
VIL: 0.75 V VIH: 4.25 V
28
P-ON CONT
5.0 V
Rev.1.0, Sep.23.2003, page 46 of 54
M61283FP
Pin no. 29
Name MCU fsc OUT
Pin Peripheral Circuitry
Notes 3.0 V
30
MCU RESET
H: 5.0 V L: 0.0 V
31 32
NC Y SW OUT
-- 1.7 V
--
33 34
Video/Chroma GND X-TAL
--
0V 3.3 V
35
NC
--
--
Rev.1.0, Sep.23.2003, page 47 of 54
M61283FP
Pin no. 36
Name CHROMA APC FILTER
Pin Peripheral Circuitry
Notes 3.2 V
37
MCU 5.7 V REG OUT
5.7 V Maximum outflow current = 2.5 mA
38 42 46 53
CVBS IN 3/2/1/4
1.7 V
39 40 44
NC Cr IN(YCbCr) Cb IN(YCbCr)
-- 2.8 V
--
41 43 45 47 50
Video/Chroma Vcc NC
-- --
5.0 V --
Rev.1.0, Sep.23.2003, page 48 of 54
M61283FP
Pin no. 48
Name Y IN(YCbCr)
Pin Peripheral Circuitry
Notes 1.7 V
49
C IN(Y/C)
1.7 V
50 51
NC Y IN(Y/C)
-- 1.7 V
--
52 54 55
VREG Vcc 5.7 V REG OUT fsc OUT
-- --
8.7 V 5.7 V 3.0 V
56 57
NC TEST
-- --
-- Connect this pin to GND.
Rev.1.0, Sep.23.2003, page 49 of 54
M61283FP
Pin no. 58
Name DELAYED Y OUT
Pin Peripheral Circuitry
Notes 2.3 V
59
E-W OUT
Operating range = 1.2V to 5.2V
60
VIDEO LINE OUT
1.7 V
61
8.7 V REG OUT
8.7 V Maximum outflow current = 1 mA
62
V RAMP AGC CAP
4V
Rev.1.0, Sep.23.2003, page 50 of 54
M61283FP
Pin no. 63
Name V OUT
Pin Peripheral Circuitry
Notes Operating range = 1.1V to 5.1V Maximum outflow current = 1 mA
64
V RAMP CAP
2.0 V to 4.0 V
Note: Voltage, current and other values appearing in the Notes column are reference values, and are not guaranteed rated values.
Rev.1.0, Sep.23.2003, page 51 of 54
M61283FP
Application Example
Note:
If a crystal oscillator other than that recommended is used, the capacitance connected to X1 (3.58 MHz Xtal) must be studied.
Rev.1.0, Sep.23.2003, page 52 of 54
M61283FP
Important Information
* Each application should be thoroughly studied and evaluated before making a decision. * 47 F and higher electrolytic capacitors and 0.01 F and higher ceramic capacitors should be connected in parallel between each of the power supply pins (10, 13, 41, 52) and ground. In addition, it is recommended that the connections be made as close to the IC power supply pins as possible. * Since pin37 (MCU5.7 V REG OUT) is weaker weaker electrostatic proof (+120V, -140V, based on the MM standard) than the other pins, an appropriate countermeasure should be taken on each application. (However, according to the HBM standard, + 1000 V or more and - 1000 V or less are assured) 2 2 * When purchasing I C bus components, a license to use these components within a I C bus system is provided under 2 the I C patent rights of Philips Corp. 2 However, the bus system must conform to the I C specifications stipulated by Philips.
Rev.1.0, Sep.23.2003, page 53 of 54
M61283FP
64P6U-A
JEDEC Code -- MD HD Weight(g) Lead Material Cu Alloy
MMP
Plastic 64pin 14 14mm body LQFP
EIAJ Package Code LQFP64-P-1414-0.8
e
Package Dimensions
b2
D
64 49
E
16
33
17
32
HE
A2
A3
Lp
Detail F
c
y x
M
b
A1
Rev.1.0, Sep.23.2003, page 54 of 54
l2
48
1
Recommended Mount Pad Symbol
A F L1
e
A A1 A2 b c D E e HD HE L L1 Lp
A3
L
x y b2 I2 MD ME
Dimension in Millimeters Min Nom Max 1.7 -- -- 0.1 0.2 0 1.4 -- 0.32 0.37 0.45 0.105 0.125 0.175 13.9 14.1 14.0 13.9 14.1 14.0 0.8 -- -- 16.0 15.8 16.2 15.8 16.2 16.0 0.3 0.5 0.7 1.0 -- 0.45 0.6 0.75 -- 0.25 -- -- -- 0.2 0.1 -- -- 0 8 -- 0.5 -- -- -- -- 0.95 -- 14.4 -- 14.4 -- --
ME
Sales Strategic Planning Div.
Keep safety first in your circuit designs!
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
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